关于本章

wikipedia Cache coherence # Coherency protocols

Distributed shared memory systems employ coherency protocols to ensure the consistency between all caches, by maintaining memory coherence according to a specific consistency model.

Older multiprocessors support the sequential consistency model, while modern shared memory systems typically support the release consistency or weak consistency models.

The protocol must implement the basic requirements for coherence. It can be tailor-made for the target system or application.

Protocols can also be classified as snoopy or directory-based. Typically, early systems used directory-based protocols where a directory would keep a track of the data being shared and the sharers. In snoopy protocols, the transaction requests (to read, write, or upgrade) are sent out to all processors. All processors snoop the request and respond appropriately.

Write propagation in snoopy protocols can be implemented by either of the following methods:

NOTE: 两种不同的方式

Write-invalidate

When a write operation is observed to a location that a cache has a copy of, the cache controller invalidates its own copy of the snooped memory location, which forces a read from main memory of the new value on its next access.[4]

NOTE:

1、Cache invalidation

2、这种方式也叫做 write back (回写)

Write-update

When a write operation is observed to a location that a cache has a copy of, the cache controller updates its own copy of the snooped memory location with the new data.

NOTE:

1、这种方式也叫做 write-through (直写)

If the protocol design states that whenever any copy of the shared data is changed, all the other copies must be "updated" to reflect the change, then it is a write-update protocol. If the design states that a write to a cached copy by any processor requires other processors to discard or invalidate their cached copies, then it is a write-invalidate protocol.

However, scalability is one shortcoming of broadcast protocols.

tau Multiprocessor Programming # Lecture 7: Spin Locks and Contention Management

NOTE:

1、其中的"7.3 Cache Memory & Consistency"中讨论了write back (回写)、write-through (直写)

各种 cache coherency protocol

本章讨论各种一些cache coherency protocol：

protocols	states	章节
MSI protocol	**M**odified、**S**hared、**I**nvalid
MESI protocol	**M**odified、**E**xclusive、**S**hared、**I**nvalid
MOESI protocol	**M**odified、**O**wned、**E**xclusive、**S**hared、**I**nvalid

可以看到，这些protocol的差异主要在于state数的不同。

TODO

下面是一些非常好的文章:

shahriar.svbtle Understanding write-through, write-around and write-back caching (with Python)

stackoverflow Write-back vs Write-Through caching?